Lemuntu

UART rts/cts support

1 219
r9ft  
Hi

Is it possible to get flow control (rts/cts) for uart0 (/dev/ttyS0)  working? I need it for external RS485 convertor TX control.
So we need to modify DTS (https://github.com/LeMaker/linux ... guitar_bbb_plus.dts) file or anything else?

In S500 Datasheet I found that "Only UART2\3 supports RTS/CTS Automatic Hardware Flow Control".
How to enable it linux support for uart2 or  uart3?

Is it possible to enable software (in serial device driver) rts/cts for uart0?

Thanks a lot for any response.
r9ft  
I found that baseboard 40-pin pin connector does not have rts/cts S500 hardware pins.

So, the only good way (I think...) is to implement software pin control in /linux-actions/arch/arm/mach-owl/serial-owl.c

I have done some quick test with it. Here is a patch to control rs485 transmitter on GPIOB8 pin 12, but it is still need to be modidfied for a good work.

Any comments?

  1. --- serial-owl.c_       2017-04-10 12:39:31.000000000 +0500
  2. +++ serial-owl.c        2017-05-05 16:58:25.816473623 +0500
  3. @@ -40,6 +40,8 @@
  4. #include <linux/dma-mapping.h>
  5. #include <linux/dma-direction.h>

  6. +#include <linux/gpio.h>
  7. +
  8. #include <mach/hardware.h>
  9. #include <mach/irqs.h>
  10. #include <mach/hdmac-owl.h>
  11. @@ -166,6 +168,17 @@

  12. static int owl_uart_start_dma(struct owl_uart_port *owl_uart_port, bool dma_to_memory);

  13. +static void txen485_on()
  14. +{
  15. +       gpio_set_value(40,1);
  16. +}
  17. +
  18. +static void txen485_off()
  19. +{
  20. +       gpio_set_value(40,0);
  21. +}
  22. +
  23. +
  24. static inline struct uart_port *get_port_from_line(unsigned int line)
  25. {
  26.         return &owl_uart_ports[line].uart;
  27. @@ -200,6 +213,8 @@
  28.         unsigned int data;
  29.         struct owl_uart_port *owl_uart_port = UART_TO_OWL_UART_PORT(port);

  30. +txen485_on();
  31. +
  32.         if (owl_uart_port->enable_dma_tx) {
  33.                 if (owl_uart_port->tx_dma_in_progress)
  34.                         return;
  35. @@ -224,10 +239,20 @@
  36.         struct owl_uart_port *owl_uart_port = UART_TO_OWL_UART_PORT(port);
  37.         unsigned int data;

  38. +
  39.         owl_uart_port->tx_dma_in_progress = 0;
  40.         if (owl_uart_port->enable_dma_tx)
  41.                 dmaengine_terminate_all(owl_uart_port->tx_dma_chan);

  42. +       data = owl_read(port, UART_STAT);
  43. +if (data & UART_STAT_TFES)
  44. +{
  45. +mdelay(10);
  46. +txen485_off();
  47. +}
  48. +
  49. +
  50. +
  51.         data = owl_read(port, UART_CTL);
  52.         data &= ~(UART_CTL_TXIE | UART_CTL_TXDE);
  53.         owl_write(port, data, UART_CTL);
  54. @@ -1531,6 +1556,10 @@
  55.                         owl_console_port);
  56. #endif

  57. +gpio_request(40,"gpio40");
  58. +gpio_direction_output(40, 0);
  59. +
  60. +
  61.         return uart_set_options(port, co, baud, parity, bits, flow);
  62. }
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